Wafer-scale arrays of imaging systems within the prior art offer the benefits of vertical (i.e., along the optical axis) integration capability and parallel assembly. FIG. 154 shows an illustration of a prior art array 5000 of optical elements 5002, in which several optical elements are arranged upon a common base 5004, such as an eight-inch or twelve-inch common base (e.g., a silicon wafer or a glass plate). Each pairing of an optical element 5002 and its associated portion of common base 5004 may be referred to as an imaging system 5005.
Many methods of fabrication may be employed for producing arrayed optical elements, including lithographic methods, replication methods, molding methods and embossing methods. Lithographic methods include, for example, the use of a patterned, electromagnetic energy blocking mask coupled with a photosensitive resist. Following exposure to electromagnetic energy, the unmasked regions of resist (or masked regions when a negative tone resist has been used) are washed away by chemical dissolution using a developer solution. The remaining resist structure may be left as is, transferred into the underlying common base by an etch process, or thermally melted (i.e., “reflown”) at temperatures up to 200° C. to allow the structure to form into a smooth, continuous, spherical and/or aspheric surface. The remaining resist, either before or after reflow, may be used as an etch mask for defining features that may be etched into the underlying common base. Furthermore, careful control of the etch selectivity (i.e., the ratio of the resist etch rate to the common base etch rate) may allow additional flexibility in the control of the surface form of the features, such as lenses or prisms.
Once created, wafer-scale arrays 5000 of optical elements 5002 may be aligned and bonded to additional arrays to form arrayed imaging systems 5006 as shown in FIG. 155. Optionally or additionally, optical elements 5002 may be formed on both sides of common base 5004. Common bases 5004 may be bonded directly together or spacers may be used to bond common bases 5004 with space therebetween. Resulting arrayed imaging systems 5006 may include an array of solid state image detectors 5008, such as complementary-metal-oxide-semiconductor (CMOS) image detectors, at the focal plane of the imaging systems. Once the wafer-scale assembly is complete, arrayed imaging systems may be separated into a plurality of imaging systems.
A key disadvantage of current wafer-scale imaging system integration is a lack of precision associated with parallel assembly. For example, vertical offset in optical elements due to thickness non-uniformities within a common base and systematic misalignment of optical elements relative to an optical axis may degrade the integrity of one or more imaging systems throughout the array. Also, prior art wafer-scale arrays of optical elements are generally created by the use of a partial fabrication master, including features for defining only one or a few optical elements in the array at a time, to “stamp out” or “mold” a few optical elements on the common base at a time; consequently, the fabrication precision of prior art wafer-scale arrays of optical elements is limited by the precision of the mechanical system that moves the partial fabrication master in relation to the common base. That is, while current technologies may enable alignment at mechanical tolerances of several microns, they do not provide optical tolerance (i.e., on the order of a wavelength of electromagnetic energy of interest) alignment accuracy required for precise imaging system manufacture. Another key disadvantage of current wafer-scale imaging system integration is that the optical materials used in prior art systems cannot withstand the reflow process temperatures.
Detectors such as, but not limited to, complementary metal-oxide-semiconductor (CMOS) detectors, may benefit from the use of lenslet arrays for increasing the fill factor and detection sensitivity of each detector pixel in the detector. Moreover, detectors may require additional filters for a variety of uses such as, for example, detecting different colors and blocking infrared electromagnetic energy. The aforementioned tasks require the addition of optical elements (e.g., lenslets and filters) to existing detectors, which is a disadvantage in using current technology.
Detectors are generally fabricated using a lithographic process and therefore include materials that are compatible with the lithographic process. For example, CMOS detectors are currently fabricated using CMOS processes and compatible materials such as crystalline silicon, silicon nitride and silicon dioxide. However, optical elements using prior art technology that are added to the detector are normally fabricated separately from the detector, possibly in different facilities, and may use materials that are not necessarily compatible with certain CMOS fabrication processes (e.g., while organic dyes may be used for color filters and organic polymers for lenslets, such materials are generally not considered to be compatible with CMOS fabrication processes). These extra fabrication and handling steps may consequently add to the overall cost and reduce the overall yield of the detector fabrication. Systems, methods, processes and applications disclosed herein overcome disadvantages associated with current wafer-scale imaging system integration and detector design and fabrication.